1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a semiconductor memory device using a termination scheme in a global data line.
2. Description of the Related Art
In general, a plurality of data lines for transferring data are disposed in a semiconductor memory device such as a double data rate synchronous DRAM (DDR SDRAM). As the capacity of the semiconductor memory device is increased, the length of the data lines is also increased. Here, the increase in the length of the data lines may cause the increase in loads of the data lines for transferring data.
Meanwhile, the data lines used in the semiconductor memory device may be divided into a segment input/output line, a local input/output line, a global input/output line, etc. depending on where they are disposed. Particularly, since a global data line such as a global input/output line has relatively large loads, distortion and loss of data may occur. Therefore, the repeater scheme in which two inverter stages are disposed in the middle of the global data line has been used to reduce distortion of data.
However, the repeater scheme is merely a driver circuit with an exemplary structure and has considerably large power consumption. Accordingly, a termination scheme of the global data line is being proposed.
FIG. 1 illustrates a conventional termination circuit.
Referring to FIG. 1, a semiconductor memory device includes a plurality of core regions 110, a termination unit 120, and a latching unit 130.
Each of the plurality of core regions 110 is a region including a memory bank, and the semiconductor memory device performs a read operation and a write operation using the memory bank. That is, in the write operation of the semiconductor memory device, data inputted through a data pad 140 (disposed in an interface region) is transferred through a global data line GIO, and the transferred data is stored in the memory bank disposed in the core region 110. In the read operation of the semiconductor memory device, the data stored in the memory bank is transferred through the global data line GIO, and the transferred data is outputted to the outside of the semiconductor memory device through the data pad 140.
The termination unit 120 is used to perform a termination operation of the global data line GIO. The termination unit 120 drives the global data line GIO to have a termination level (VDD/2) in response to a termination control signal TM_CTR. In this case, the termination control signal TM_CTR is a signal activated during read and write operation periods of data, and it may correspond to a column command signal activated in the read and write operations. The termination unit 120 is disposed between a ground voltage VSS terminal and a power supply voltage VDD terminal.
Subsequently, the latching unit 130 is a component for preventing the global data line GIO from being floated.
Hereinafter, the conventional termination operation will be briefly described.
When the termination operation is performed, i.e., when the termination control signal TM_CTR is activated as a logic ‘high,’ both PMOS and NMOS transistors in the termination unit 120 are turned on. Thus, the voltage level of the global data line GIO is terminated at the termination level (VDD/2).
As described above, the termination control signal TM_CTR is a signal activated during the read and write operation periods of data in the semiconductor memory device, and a direct current path including the PMOS and NMOS transistors is formed in the termination operation. That is, in the conventional semiconductor memory device, the direct current path is formed in the termination operation, and a large amount of current is consumed through the direct current path.
Meanwhile, as the storage capacity of the semiconductor memory device becomes larger, the length of a data line becomes longer, and the length of the global data line GIO also becomes longer. In order to perform a termination operation of the global data line GIO which is longer as described above, the circuit size of the termination unit 120 increases.